This invention relates to contact structures to establish electrical contact with contact targets such as pads, electrode, or leads of electronic circuits or devices, and more particularly, to contact structures to be used such as in a probe card to test semiconductor wafers, packaged semiconductor devices, IC chips, printed circuit boards and the like, with an higher speed, frequency range, density and quality.
In testing high density and high speed electrical devices such as LSI and VLSI circuits, high performance contact structures such as probe contactors must be used. The contact structure of the present invention is not limited to the application of testing, including burn-in testing, of semiconductor wafers and dice, but is inclusive of testing and burn-in of packaged semiconductor devices, printed circuit boards and the like. However, for the convenience of explanation, the present invention is described mainly with reference to the semiconductor wafer testing.
In the case where semiconductor devices to be tested are in the form of a semiconductor wafer, a semiconductor test system such as an IC tester is usually accompanied with a substrate handler, such as an automatic wafer prober, to automatically test the semiconductor wafer. Such an example is shown in FIG. 1 in which a semiconductor test system has a test head 100 which is ordinarily in a separate housing and is electrically connected to the main frame of the test system with a bundle of cables 110. The test head 100 and a substrate handler 400 are mechanically and electrically interacted with one another with the aid of a manipulator 500 driven by a motor 510. The semiconductor wafers to be tested are automatically provided to a test position of the test head 100 by the substrate handler 400.
On the test head 100, the semiconductor wafer to be tested is provided with test signals generated by the semiconductor test system. The resultant output signals from IC circuits on the semiconductor wafer under test are transmitted to the semiconductor test system wherein they are compared with expected data to determine whether the IC circuits on the semiconductor wafer function correctly.
As shown in FIG. 2, the test head 100 and the substrate handler 400 are connected with an interface component 140. The interface component 140 includes a performance board 120 which is a printed circuit board having electric circuit connections unique to a test head""s electrical footprint, coaxial cables, pogo-pins and connectors. The test head 100 includes a large number of printed circuit boards 150 which correspond to the number of test channels or test pins. Each of the printed circuit boards has a connector 160 to receive a corresponding contact terminal 121 of the performance board 120. A xe2x80x9cfrogxe2x80x9d ring 130 is mounted on the performance board 120 to accurately determine the contact position relative to the substrate handler 400. The frog ring 130 has a large number of contact pins 141, such as ZIF connectors or pogo-pins, connected to contact terminals 121, through coaxial cables 124.
In the substrate handler 400, a semiconductor wafer 300 to be tested is mounted on a chuck 180. A probe card 170 is provided above the semiconductor wafer 300 to be tested. The probe card 170 has a large number of probe contactors or contact structures (such as cantilevers or needles) 190 to contact with circuit terminals or contact targets in the IC circuit of the semiconductor wafer 300 under test.
Electrical terminals or contact receptacles of the probe card 170 are electrically connected to the contact pins 141 provided on the frog ring 130. The contact pins 141 are also connected to the contact terminals 121 of the performance board 120 with coaxial cables 124 where each contact terminal 121 is connected to the printed circuit board 150 of the test head 100. Further, the printed circuit boards 150 are connected to the semiconductor test system through the cable 110 having several hundreds of inner cables.
Under this arrangement, the contactors 190 contact the surface of the semiconductor wafer 300 on the chuck 180 to apply test signals to the semiconductor wafer 300 and receive the resultant output signals from the wafer 300. The resultant output signals from the semiconductor wafer 300 under test are compared with the expected data generated by the semiconductor test system to determine whether the semiconductor wafer 300 performs properly.
FIG. 3 is a bottom view of the probe card 170 of FIG. 2. In this example, the probe card 170 has an epoxy ring on which a plurality of contactors 190 called needles or cantilevers are mounted. When the chuck 180 mounting the semiconductor wafer 300 moves upward in FIG. 2, the tips of the cantilever contactors 190 contact the pads or bumps on the wafer 300. The ends of the contactors 190 are connected to wires 194 which are further connected to transmission lines (not shown) formed in the probe card 170. The transmission lines are connected to a plurality of electrodes 197 which contact the pogo pins 141 of FIG. 2.
Typically, the probe card 170 is structured by a multi-layer of polyimide substrates having ground planes, power planes, signal transmission lines on many layers. As is well known in the art, each of the signal transmission lines is designed to have a characteristic impedance such as 50 ohms by balancing the distributed parameters, i.e., dielectric constant of the polyimide, inductances, and capacitances of the signal within the probe card 170. Thus, the signal lines are impedance matched lines to achieve a high frequency transmission bandwidth to the wafer 300 providing current during steady state and high current peaks generated by the device""s outputs switching. For removing noise, capacitors 193 and 195 are provided on the probe card between the power and ground planes.
An equivalent circuit of the probe card 170 is shown in FIG. 4 to explain the limitation of bandwidth in the conventional probe card technology. As shown in FIGS. 4A and 4B, the signal transmission line on the probe card 170 extends from the electrode 197, the strip (impedance matched) line 196, the wire 194 and the contactor (needle) 190. Since the wire 194 and the contactor 190 are not impedance matched, these portions function as an inductor L in the high frequency band as shown in FIG. 4C. Because of the overall length of the wire 194 and contactor 190 is around 20-30 mm, the significant frequency limitation is resulted in testing a high frequency performance of a device under test.
Other factors which limit the frequency bandwidth in the probe card 170 reside in the power and ground needles shown in FIGS. 4D and 4E. If the power line can provide large enough currents to the device under test, it will not seriously limit the operational bandwidth in testing the device. However, because the series connected wire 194 and contactor 190 for supplying the power (FIG. 4D) as well as the series connected wire 194 and contactor 190 for grounding the power and signals (FIG. 4E) are equivalent to inductors, the high speed current flow is seriously restricted.
Moreover, the capacitors 193 and 195 are provided between the power line and the ground line to secure a proper performance of the device under test by filtering out the noise or surge pulses on the power lines. The capacitors 193 have a relatively large value such as 10 xcexcF and can be disconnected from the power lines by switches if necessary. The capacitors 195 have a relatively small capacitance value such as 0.01 xcexcF and fixedly connected close to the DUT. These capacitors serve the function as high frequency decoupling on the power lines.
Accordingly, the most widely used probe contactors as noted above are limited to the frequency bandwidth of approximately 200 MHz which is insufficient to test recent semiconductor devices. It is considered, in the industry, that the frequency bandwidth be of at least that equal to the tester""s capability which is currently on the order of 1 GHz or higher, will be necessary in the near future. Further, it is desired in the industry that a probe card is capable of handling a large number of semiconductor devices, especially memories, such as 32 or more, in parallel (parallel test) to increase test throughput.
In the conventional technology, the probe card and probe contactors such as shown in FIG. 3 are manually made, resulting in inconsistent quality. Such inconsistent quality includes fluctuations of size, frequency bandwidth, contact force and resistance, etc. In the conventional probe contactors, another factor that makes the contact performance unreliable is that the probe contactors and the semiconductor wafer under test have different temperature expansion ratios. Thus, under the varying temperature, the contact positions therebetween vary which adversely affects the contact force, contact resistance and bandwidth.
Therefore, it is an object of the present invention to provide a contact structure having a high operating frequency for electrically contacting with contact targets such as a semiconductor wafer, packaged LSI and the like.
It is another object of the present invention to provide a contact structure for establishing electrical communication with contact target such as a semiconductor wafer, packaged LSI and the like, which is suitable for testing a large number of semiconductor devices in a parallel fashion at the same time.
It is a further object of the present invention to provide a contact structure for testing a semiconductor wafer, packaged LSI and the like which is produced through a semiconductor production process without involving manual assembly or handling, thereby achieving uniform and consistent quality.
It is a further object of the present invention to provide a contact structure to be used in combination with a probe card for testing a semiconductor wafer, packaged LSI and the like, which are capable of compensating temperature expansion coefficient of a semiconductor wafer under test.
In one aspect of the present invention, the contact structure is formed of a plurality of beam like contactors and a contact substrate mounting the contactors. Typically, the contactors are formed through a photolithography technology. The contactor is configured by a silicon base having an inclined edge at each end, a silicon beam provided on the silicon base and projected from the silicon base and has an diagonal edge at each end, and a conductive layer formed along a top surface of the silicon beam.
Another aspect of the present invention is a contact structure if formed of a plurality of finger like contactors each having a bonding step thereon and a contact substrate mounting the contactors. Typically, the contactors are produced through the photolithography process. The contactor is configured by a silicon base having an inclined edge at each end, a silicon beam provided on the silicon base and projected from the silicon base and has an diagonal edge at each end, a conductive layer formed along a top surface of the silicon beam, and a bonding step formed on the surface of the conductive layer.
A further aspect of the present invention is a process for producing the contact structure. The method of producing the contact structure is comprised of the steps of providing a silicon substrate cut in a (100) crystal plane, forming a mask pattern on an upper surface of the silicon substrate, applying an etching process to the upper surface of the silicon substrate for forming a silicon beam, forming a mask pattern on a bottom surface of the silicon substrate, applying an etching process to the bottom surface of the silicon substrate for forming a silicon base, and depositing conductive material on a top surface of the silicon beam.
According to the present invention, the contact structure has a very high frequency bandwidth to meet the requirements in the next generation semiconductor technology. Since the contactors are produced through a semiconductor production process, a large number of contactors can be aligned in a small space which is suitable for testing a large number of semiconductor devices at the same time.
Since the large number of contactors are produced at the same time on the substrate with the use of the semiconductor microfabrication technology without involving manual handling, it is possible to achieve consistent quality, high reliability and long life in the contact performance. Further, because the probe contactors can be fabricated on the same substrate material as that of the device under test, it is possible to compensate the temperature expansion coefficient of the device under test, which is able to avoid positional errors.